Difference between revisions of "PM Opc MOV16"

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(New page: == MOV = Move Register (16-Bits) == {| border="1" style="text-align:left" !Hex !Mnemonic !Cycles ! !Hex !Mnemonic !Cycles |- |B8 nn nn |MOV BA, [#nnnn] |20 | |B9 nn nn |MOV HL, [#nnnn] |2...)
 
Line 495: Line 495:
 
=== Examples ===
 
=== Examples ===
  
  ; A = 0x??
+
  ; A = 0xF0
  ; B = 0x??
+
  ; B = 0x0E
 
  MOV BA, $1337
 
  MOV BA, $1337
 
  ; A = 0x37
 
  ; A = 0x37
Line 512: Line 512:
  
 
  ; [HL] = 0xBEEF
 
  ; [HL] = 0xBEEF
  ; BA = 0xDEAD
+
  ; A = 0xAD
 +
; B = 0xDE
 
  MOV BA, [HL]
 
  MOV BA, [HL]
 
  ; [HL] = 0xBEEF
 
  ; [HL] = 0xBEEF
  ; BA = 0xBEEF
+
  ; A = 0xEF
 +
; B = 0xBE
  
 
[[PM_InstructionList|'''« Back to Instruction set''']]
 
[[PM_InstructionList|'''« Back to Instruction set''']]

Revision as of 17:52, 30 May 2008

MOV = Move Register (16-Bits)

Hex Mnemonic Cycles Hex Mnemonic Cycles
B8 nn nn MOV BA, [#nnnn] 20 B9 nn nn MOV HL, [#nnnn] 20
BA nn nn MOV X, [#nnnn] 20 BB nn nn MOV Y, [#nnnn] 20
CF 78 nn nn MOV SP, [#nnnn] 24
BC nn nn MOV [#nnnn], BA 20 BD nn nn MOV [#nnnn], HL 20
BE nn nn MOV [#nnnn], X 20 BF nn nn MOV [#nnnn], Y 20
CF 7C nn nn MOV [#nnnn], SP 24
C4 nn nn MOV BA, #nnnn 12 C5 nn nn MOV HL, #nnnn 12
C6 nn nn MOV X, #nnnn 12 C7 nn nn MOV Y, #nnnn 12
CF 6E nn nn MOV SP, #nnnn 16
CF 70 ss MOV BA, [SP+#ss] 24 CF 71 ss MOV HL, [SP+#ss] 24
CF 72 ss MOV X, [SP+#ss] 24 CF 73 ss MOV Y, [SP+#ss] 24
CF 74 ss MOV [SP+#ss], BA 24 CF 75 ss MOV [SP+#ss], HL 24
CF 76 ss MOV [SP+#ss], X 24 CF 77 ss MOV [SP+#ss], Y 24
CF C0 MOV BA, [HL] 20 CF C1 MOV HL, [HL] 20
CF C2 MOV X, [HL] 20 CF C3 MOV Y, [HL] 20
CF D0 MOV BA, [X] 20 CF D1 MOV HL, [X] 20
CF D2 MOV X, [X] 20 CF D3 MOV Y, [X] 20
CF D8 MOV BA, [Y] 20 CF D9 MOV HL, [Y] 20
CF DA MOV X, [Y] 20 CF DB MOV Y, [Y] 20
CF C4 MOV [HL], BA 20 CF C5 MOV [HL], HL 20
CF C6 MOV [HL], X 20 CF C7 MOV [HL], Y 20
CF D4 MOV [X], BA 20 CF D5 MOV [X], HL 20
CF D6 MOV [X], X 20 CF D7 MOV [X], Y 20
CF DC MOV [Y], BA 20 CF DD MOV [Y], HL 20
CF DE MOV [Y], X 20 CF DF MOV [Y], Y 20
CF E0 MOV BA, BA 8 CF E1 MOV BA, HL 8
CF E2 MOV BA, X 8 CF E3 MOV BA, Y 8
CF E4 MOV HL, BA 8 CF E5 MOV HL, HL 8
CF E6 MOV HL, X 8 CF E7 MOV HL, Y 8
CF E8 MOV X, BA 8 CF E9 MOV X, HL 8
CF EA MOV X, X 8 CF EB MOV X, Y 8
CF EC MOV Y, BA 8 CF ED MOV Y, HL 8
CF EE MOV Y, X 8 CF EF MOV Y, Y 8
CF F0 MOV SP, BA 8 CF F1 MOV SP, HL 8
CF F2 MOV SP, X 8 CF F3 MOV SP, Y 8
CF F4 MOV HL, SP 8 CF F5 MOV HL, PC 8
CF F8 MOV BA, SP 8 CF F9 MOV BA, PC 8
CF FA MOV X, SP 8 CF FE MOV Y, SP 8

Source as the column, and Destination as the row:

#nnnn BA HL X Y SP PC [HL] [X] [Y] [#nnnn] [SP+#ss]
BA C4 nn nn CF E0 CF E1 CF E2 CF E3 CF F8 CF F9 CF C0 CF D0 CF D8 B8 nn nn CF 70 ss
HL C5 nn nn CF E4 CF E5 CF E6 CF E7 CF F4 CF F5 CF C1 CF D1 CF D9 B9 nn nn CF 71 ss
X C6 nn nn CF E8 CF E9 CF EA CF EB CF FA CF C2 CF D2 CF DA BA nn nn CF 72 ss
Y C7 nn nn CF EC CF ED CF EE CF EF CF FE CF C3 CF D3 CF DB BB nn nn CF 73 ss
SP CF 6E nn nn CF F0 CF F1 CF F2 CF F3 CF 78 nn nn
[HL] CF C4 CF C5 CF C6 CF C7
[X] CF D4 CF D5 CF D6 CF D7
[Y] CF DC CF DD CF DE CF DF
[#nnnn] BC nn nn BD nn nn BE nn nn BF nn nn CF 6E nn nn
[SP+#ss] CF 74 ss CF 75 ss CF 76 ss CF 77

Execute

#nnnn    = Immediate unsigned 16-Bits
#ss      = Immediate signed 8-Bits
BA       = Register BA: (B shl 8) or A
HL       = Register HL: (H shl 8) or L
X        = Register X
Y        = Register Y
SP       = Register SP (Stack Pointer)
PC       = Register PC (Program Counter)
[HL]     = Memory: (I shl 16) or HL
[X]      = Memory: (XI shl 16) or X
[Y]      = Memory: (YI shl 16) or Y
[#nnnn]  = Memory: (I shl 16) or #nnnn
[SP+#ss] = Memory: SP + #ss
; MOV Ds, Sc
;
; Ds = Destination
; Sc = Source

Ds = Sc

Description

16-Bits Source gets copied to the 16-Bits Destination.

Conditions

None

Examples

; A = 0xF0
; B = 0x0E
MOV BA, $1337
; A = 0x37
; B = 0x13
; A = 0x12
; B = 0xCF
; L = 0x7E
; H = 0xAB
MOV BA, HL
; A = 0x7E
; B = 0xAB
; L = 0x7E
; H = 0xAB
; [HL] = 0xBEEF
; A = 0xAD
; B = 0xDE
MOV BA, [HL]
; [HL] = 0xBEEF
; A = 0xEF
; B = 0xBE

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