Difference between revisions of "Pokemon Mini"
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(Undo revision 267 by 94.102.60.182 (Talk)) |
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| − | + | == Pokemon Mini Hardware Overview == | |
| + | The Pokemon Mini is a hand held created by Nintendo R&D3 around 1999. The hardware as engineered entirely in-house and does not appear to contain any off the shelf parts other than a few slightly less important crucial elements like the LCD controller and internal EEPROM. The system is built around a 4mhz custom CPU (with a 4 cycle data access period), with a 4k bios image, 4k of ram and a 21-bit cartridge bus. The internal memory map is decoded as 24-bit with no known mirrors. The entire system is controlled by writting to 256 hardware registers, most of which are [[Open-Bus]]. | ||
| + | |||
| + | * [[Minx Cpu|The Pokemon Mini CPU: Minx]] | ||
| + | ** [[Minx Cpu|Minx Overview]] | ||
| + | ** [[PM_InstructionList|Instruction Set]] | ||
| + | ** [[PM_IRQs|Interrupt Hardware]] | ||
| + | * [[PM Memory|The Memory Map]] | ||
| + | * [[PM Bios|Internal BIOS]] | ||
| + | * [[PM RAM|The Memory]] | ||
| + | * [[PM Registers|The Hardware Registers]] | ||
| + | * [[PM Cartridge|Cartridge Memory]] | ||
| + | |||
| + | |||
| + | * [[Unknown PM Stuff]] | ||
Revision as of 01:28, 24 November 2008
Pokemon Mini Hardware Overview
The Pokemon Mini is a hand held created by Nintendo R&D3 around 1999. The hardware as engineered entirely in-house and does not appear to contain any off the shelf parts other than a few slightly less important crucial elements like the LCD controller and internal EEPROM. The system is built around a 4mhz custom CPU (with a 4 cycle data access period), with a 4k bios image, 4k of ram and a 21-bit cartridge bus. The internal memory map is decoded as 24-bit with no known mirrors. The entire system is controlled by writting to 256 hardware registers, most of which are Open-Bus.
- The Pokemon Mini CPU: Minx
- The Memory Map
- Internal BIOS
- The Memory
- The Hardware Registers
- Cartridge Memory
