Difference between revisions of "S1C88 InstructionSet"
m |
(→CALL = Call routine) |
||
Line 2,196: | Line 2,196: | ||
|- | |- | ||
|E0 nn | |E0 nn | ||
− | |[[ | + | |[[PM_Opc_CALL|CALLC short #ss]] |
|20 / 8 (Not met) | |20 / 8 (Not met) | ||
|- | |- | ||
|E1 nn | |E1 nn | ||
− | |[[ | + | |[[PM_Opc_CALL|CALLNC short #ss]] |
|20 / 8 (Not met) | |20 / 8 (Not met) | ||
|- | |- | ||
|E2 nn | |E2 nn | ||
− | |[[ | + | |[[PM_Opc_CALL|CALLZ short #ss]] |
|20 / 8 (Not met) | |20 / 8 (Not met) | ||
|- | |- | ||
|E3 nn | |E3 nn | ||
− | |[[ | + | |[[PM_Opc_CALL|CALLNZ short #ss]] |
|20 / 8 (Not met) | |20 / 8 (Not met) | ||
|- | |- | ||
|E8 nn nn | |E8 nn nn | ||
− | |[[ | + | |[[PM_Opc_CALL|CALLC long #ssss]] |
|24 / 12 (Not met) | |24 / 12 (Not met) | ||
|- | |- | ||
|E9 nn nn | |E9 nn nn | ||
− | |[[ | + | |[[PM_Opc_CALL|CALLNC long #ssss]] |
|24 / 12 (Not met) | |24 / 12 (Not met) | ||
|- | |- | ||
|EA nn nn | |EA nn nn | ||
− | |[[ | + | |[[PM_Opc_CALL|CALLZ long #ssss]] |
|24 / 12 (Not met) | |24 / 12 (Not met) | ||
|- | |- | ||
|EB nn nn | |EB nn nn | ||
− | |[[ | + | |[[PM_Opc_CALL|CALLNZ long #ssss]] |
|24 / 12 (Not met) | |24 / 12 (Not met) | ||
|- | |- | ||
|F0 nn | |F0 nn | ||
− | |[[ | + | |[[PM_Opc_CALL|CALL short #ss]] |
|20 | |20 | ||
|- | |- | ||
|F2 nn nn | |F2 nn nn | ||
− | |[[ | + | |[[PM_Opc_CALL|CALL long #ssss]] |
|24 | |24 | ||
|- | |- | ||
Line 2,244: | Line 2,244: | ||
|- | |- | ||
|CE F0 nn | |CE F0 nn | ||
− | |[[ | + | |[[PM_Opc_CALL|CALLL short #ss]] |
|24 / 12 (Not met) | |24 / 12 (Not met) | ||
|- | |- | ||
|CE F1 nn | |CE F1 nn | ||
− | |[[ | + | |[[PM_Opc_CALL|CALLLE short #ss]] |
|24 / 12 (Not met) | |24 / 12 (Not met) | ||
|- | |- | ||
|CE F2 nn | |CE F2 nn | ||
− | |[[ | + | |[[PM_Opc_CALL|CALLG short #ss]] |
|24 / 12 (Not met) | |24 / 12 (Not met) | ||
|- | |- | ||
|CE F3 nn | |CE F3 nn | ||
− | |[[ | + | |[[PM_Opc_CALL|CALLGE short #ss]] |
|24 / 12 (Not met) | |24 / 12 (Not met) | ||
|- | |- | ||
|CE F4 nn | |CE F4 nn | ||
− | |[[ | + | |[[PM_Opc_CALL|CALLO short #ss]] |
|24 / 12 (Not met) | |24 / 12 (Not met) | ||
|- | |- | ||
|CE F5 nn | |CE F5 nn | ||
− | |[[ | + | |[[PM_Opc_CALL|CALLNO short #ss]] |
|24 / 12 (Not met) | |24 / 12 (Not met) | ||
|- | |- | ||
|CE F6 nn | |CE F6 nn | ||
− | |[[ | + | |[[PM_Opc_CALL|CALLP short #ss]] |
|24 / 12 (Not met) | |24 / 12 (Not met) | ||
|- | |- | ||
|CE F7 nn | |CE F7 nn | ||
− | |[[ | + | |[[PM_Opc_CALL|CALLNP short #ss]] |
|24 / 12 (Not met) | |24 / 12 (Not met) | ||
|- | |- | ||
|CE F8 nn | |CE F8 nn | ||
− | |[[ | + | |[[PM_Opc_CALL|CALLNX0 short #ss]] |
|24 / 12 (Not met) | |24 / 12 (Not met) | ||
|- | |- | ||
|CE F9 nn | |CE F9 nn | ||
− | |[[ | + | |[[PM_Opc_CALL|CALLNX1 short #ss]] |
|24 / 12 (Not met) | |24 / 12 (Not met) | ||
|- | |- | ||
|CE FA nn | |CE FA nn | ||
− | |[[ | + | |[[PM_Opc_CALL|CALLNX2 short #ss]] |
|24 / 12 (Not met) | |24 / 12 (Not met) | ||
|- | |- | ||
|CE FB nn | |CE FB nn | ||
− | |[[ | + | |[[PM_Opc_CALL|CALLNX3 short #ss]] |
|24 / 12 (Not met) | |24 / 12 (Not met) | ||
|- | |- | ||
|CE FC nn | |CE FC nn | ||
− | |[[ | + | |[[PM_Opc_CALL|CALLX0 short #ss]] |
|24 / 12 (Not met) | |24 / 12 (Not met) | ||
|- | |- | ||
|CE FD nn | |CE FD nn | ||
− | |[[ | + | |[[PM_Opc_CALL|CALLX1 short #ss]] |
|24 / 12 (Not met) | |24 / 12 (Not met) | ||
|- | |- | ||
|CE FE nn | |CE FE nn | ||
− | |[[ | + | |[[PM_Opc_CALL|CALLX2 short #ss]] |
|24 / 12 (Not met) | |24 / 12 (Not met) | ||
|- | |- | ||
|CE FF nn | |CE FF nn | ||
− | |[[ | + | |[[PM_Opc_CALL|CALLX3 short #ss]] |
|24 / 12 (Not met) | |24 / 12 (Not met) | ||
|} | |} |
Revision as of 15:11, 25 May 2008
Contents
- 1 NOP = No Operation
- 2 MOV = Move Register
- 3 ADD = Addition
- 4 SUB = Subtraction
- 5 ADC = Addition with Carry
- 6 SBC = Subtraction with Carry
- 7 CMP = Compare
- 8 TST = Test Bits
- 9 AND = Logical AND
- 10 OR = Logical Inclusive-OR
- 11 XOR = Logical Exclusive-OR
- 12 INC = Increase Register by 1
- 13 DEC = Decrease Register by 1
- 14 PUSH = Push Register into Stack
- 15 POP = Pop Register from Stack
- 16 XCHG = Exchange Registers
- 17 PACK = Pack and Unpack Nibbles
- 18 SWAP = Swap Low and High Nibbles
- 19 CALL = Call routine
- 20 JMP = Jump routine (Branch routine)
- 21 RET = Return from routine
- 22 SHL = Shift Left
- 23 SAL = Shift Alternative Left
- 24 SHR = Shift Right
- 25 SAR = Shift Alternative Right
- 26 ROL = Rotate Left
- 27 ROLC = Rotate Left though Carry
- 28 ROR = Rotate Right
- 29 RORC = Rotate Right though Carry
- 30 NOT = Logical NOT
- 31 NEG = Negate
- 32 EX = Expand Register
- 33 HALT = Halt CPU
- 34 STOP = Stop CPU
- 35 MUL = Multiply
- 36 DIV = Divide
NOP = No Operation
Hex | Mnemonic | Cycles |
---|---|---|
FF | NOP | 8 |
Flags Affected: None
MOV = Move Register
Flags Affected: None
ADD = Addition
Hex | Mnemonic | Cycles |
---|---|---|
00 | ADD A, A | 8 |
01 | ADD A, B | 8 |
02 nn | ADD A, #nn | 8 |
03 | ADD A, [HL] | 8 |
04 nn | ADD A, [N+#nn] | 12 |
05 nn nn | ADD A, [#nnnn] | 16 |
06 | ADD A, [X] | 8 |
07 | ADD A, [Y] | 8 |
C0 nn nn | ADD BA, #nnnn | 12 |
C1 nn nn | ADD HL, #nnnn | 12 |
C2 nn nn | ADD X, #nnnn | 12 |
C3 nn nn | ADD Y, #nnnn | 12 |
CF 68 nn nn | ADD SP, #nnnn | 16 |
CE 00 nn | ADD A, [X+#ss] | 16 |
CE 01 nn | ADD A, [Y+#ss] | 16 |
CE 02 | ADD A, [X+L] | 16 |
CE 03 | ADD A, [Y+L] | 16 |
CE 04 | ADD [HL], A | 16 |
CE 05 nn | ADD [HL], #nn | 20 |
CE 06 | ADD [HL], [X] | 20 |
CE 07 | ADD [HL], [Y] | 20 |
CF 00 | ADD BA, BA | 16 |
CF 01 | ADD BA, HL | 16 |
CF 02 | ADD BA, X | 16 |
CF 03 | ADD BA, Y | 16 |
CF 20 | ADD HL, BA | 16 |
CF 21 | ADD HL, HL | 16 |
CF 22 | ADD HL, X | 16 |
CF 23 | ADD HL, Y | 16 |
CF 40 | ADD X, BA | 16 |
CF 41 | ADD X, HL | 16 |
CF 42 | ADD Y, BA | 16 |
CF 43 | ADD Y, HL | 16 |
CF 44 | ADD SP, BA | 16 |
CF 45 | ADD SP, HL | 16 |
Flags Affected: All
SUB = Subtraction
Hex | Mnemonic | Cycles |
---|---|---|
10 | SUB A, A | 8 |
11 | SUB A, B | 8 |
12 nn | SUB A, #nn | 8 |
13 | SUB A, [HL] | 8 |
14 nn | SUB A, [N+#nn] | 12 |
15 nn nn | SUB A, [#nnnn] | 16 |
16 | SUB A, [X] | 8 |
17 | SUB A, [Y] | 8 |
D0 nn nn | SUB BA, #nnnn | 12 |
D1 nn nn | SUB HL, #nnnn | 12 |
D2 nn nn | SUB X, #nnnn | 12 |
D3 nn nn | SUB Y, #nnnn | 12 |
CF 6A nn nn | SUB SP, #nnnn | 16 |
CE 10 nn | SUB A, [X+#ss] | 16 |
CE 11 nn | SUB A, [Y+#ss] | 16 |
CE 12 | SUB A, [X+L] | 16 |
CE 13 | SUB A, [Y+L] | 16 |
CE 14 | SUB [HL], A | 16 |
CE 15 nn | SUB [HL], #nn | 20 |
CE 16 | SUB [HL], [X] | 20 |
CE 17 | SUB [HL], [Y] | 20 |
CF 08 | SUB BA, BA | 16 |
CF 09 | SUB BA, HL | 16 |
CF 0A | SUB BA, X | 16 |
CF 0B | SUB BA, Y | 16 |
CF 28 | SUB HL, BA | 16 |
CF 29 | SUB HL, HL | 16 |
CF 2A | SUB HL, X | 16 |
CF 2B | SUB HL, Y | 16 |
CF 48 | SUB X, BA | 16 |
CF 49 | SUB X, HL | 16 |
CF 4A | SUB Y, BA | 16 |
CF 4B | SUB Y, HL | 16 |
CF 4C | SUB SP, BA | 16 |
CF 4D | SUB SP, HL | 16 |
Flags Affected: All
ADC = Addition with Carry
Hex | Mnemonic | Cycles |
---|---|---|
08 | ADC A, A | 8 |
09 | ADC A, B | 8 |
0A nn | ADC A, #nn | 8 |
0B | ADC A, [HL] | 8 |
0C nn | ADC A, [N+#nn] | 12 |
0D nn nn | ADC A, [#nnnn] | 16 |
0E | ADC A, [X] | 8 |
0F | ADC A, [Y] | 8 |
CE 08 nn | ADC A, [X+#ss] | 16 |
CE 09 nn | ADC A, [Y+#ss] | 16 |
CE 0A | ADC A, [X+L] | 16 |
CE 0B | ADC A, [Y+L] | 16 |
CE 0C | ADC [HL], A | 16 |
CE 0D nn | ADC [HL], #nn | 20 |
CE 0E | ADC [HL], [X] | 20 |
CE 0F | ADC [HL], [Y] | 20 |
CF 04 | ADC BA, BA | 16 |
CF 05 | ADC BA, HL | 16 |
CF 06 | ADC BA, X | 16 |
CF 07 | ADC BA, Y | 16 |
CF 24 | ADC HL, BA | 16 |
CF 25 | ADC HL, HL | 16 |
CF 26 | ADC HL, X | 16 |
CF 27 | ADC HL, Y | 16 |
CF 60 nn nn | ADC BA, #nnnn | 16 |
CF 61 nn nn | ADC HL, #nnnn | 16 |
Flags Affected: All
SBC = Subtraction with Carry
Hex | Mnemonic | Cycles |
---|---|---|
18 | SBC A, A | 8 |
19 | SBC A, B | 8 |
1A nn | SBC A, #nn | 8 |
1B | SBC A, [HL] | 8 |
1C nn | SBC A, [N+#nn] | 12 |
1D nn nn | SBC A, [#nnnn] | 16 |
1E | SBC A, [X] | 8 |
1F | SBC A, [Y] | 8 |
CE 18 nn | SBC A, [X+#ss] | 16 |
CE 19 nn | SBC A, [Y+#ss] | 16 |
CE 1A | SBC A, [X+L] | 16 |
CE 1B | SBC A, [Y+L] | 16 |
CE 1C | SBC [HL], A | 16 |
CE 1D nn | SBC [HL], #nn | 20 |
CE 1E | SBC [HL], [X] | 20 |
CE 1F | SBC [HL], [Y] | 20 |
CF 0C | SBC BA, BA | 16 |
CF 0D | SBC BA, HL | 16 |
CF 0E | SBC BA, X | 16 |
CF 0F | SBC BA, Y | 16 |
CF 2C | SBC HL, BA | 16 |
CF 2D | SBC HL, HL | 16 |
CF 2E | SBC HL, X | 16 |
CF 2F | SBC HL, Y | 16 |
CF 62 nn nn | SBC BA, #nnnn | 16 |
CF 63 nn nn | SBC HL, #nnnn | 16 |
Flags Affected: All
CMP = Compare
Hex | Mnemonic | Cycles |
---|---|---|
30 | CMP A, A | 8 |
31 | CMP A, B | 8 |
32 nn | CMP A, #nn | 8 |
33 | CMP A, [HL] | 8 |
34 nn | CMP A, [N+#nn] | 12 |
35 nn nn | CMP A, [#nnnn] | 16 |
36 | CMP A, [X] | 8 |
37 | CMP A, [Y] | 8 |
D4 nn nn | CMP BA, #nnnn | 12 |
D5 nn nn | CMP HL, #nnnn | 12 |
D6 nn nn | CMP X, #nnnn | 12 |
D7 nn nn | CMP Y, #nnnn | 12 |
CF 6C nn nn | CMP SP, #nnnn | 16 |
DB nn nn | CMP [N+#nn], #nn | 16 |
CE 30 nn | CMP A, [X+#ss] | 16 |
CE 31 nn | CMP A, [Y+#ss] | 16 |
CE 32 | CMP A, [X+L] | 16 |
CE 33 | CMP A, [Y+L] | 16 |
CE 34 | CMP [HL], A | 16 |
CE 35 nn | CMP [HL], #nn | 20 |
CE 36 | CMP [HL], [X] | 20 |
CE 37 | CMP [HL], [Y] | 20 |
CE BC nn | CMP B, #nn | 12 |
CE BD nn | CMP L, #nn | 12 |
CE BE nn | CMP H, #nn | 12 |
CF 18 | CMP BA, BA | 16 |
CF 19 | CMP BA, HL | 16 |
CF 1A | CMP BA, X | 16 |
CF 1B | CMP BA, Y | 16 |
CF 38 | CMP HL, BA | 16 |
CF 39 | CMP HL, HL | 16 |
CF 3A | CMP HL, X | 16 |
CF 3B | CMP HL, Y | 16 |
CF 5C | CMP SP, BA | 16 |
CF 5D | CMP SP, HL | 16 |
Flags Affected: All
TST = Test Bits
Hex | Mnemonic | Cycles |
---|---|---|
94 | TST A, B | 8 |
95 nn | TST [HL], #nn | 12 |
96 nn | TST A, #nn | 8 |
97 nn | TST B, #nn | 8 |
DC nn nn | TST [N+#nn], #nn | 16 |
Flags Affected: Zero, Sign
AND = Logical AND
Hex | Mnemonic | Cycles |
---|---|---|
20 | AND A, A | 8 |
21 | AND A, B | 8 |
22 nn | AND A, #nn | 8 |
23 | AND A, [HL] | 8 |
24 nn | AND A, [N+#nn] | 12 |
25 nn nn | AND A, [#nnnn] | 16 |
26 | AND A, [X] | 8 |
27 | AND A, [Y] | 8 |
9C nn | AND F, #nn | 12 |
CE B0 nn | AND B, #nn | 12 |
CE B1 nn | AND L, #nn | 12 |
CE B2 nn | AND H, #nn | 12 |
D8 nn nn | AND [N+#nn], #nn | 20 |
CE 20 nn | AND A, [X+#ss] | 16 |
CE 21 nn | AND A, [Y+#ss] | 16 |
CE 22 | AND A, [X+L] | 16 |
CE 23 | AND A, [Y+L] | 16 |
CE 24 | AND [HL], A | 16 |
CE 25 nn | AND [HL], #nn | 20 |
CE 26 | AND [HL], [X] | 20 |
CE 27 | AND [HL], [Y] | 20 |
Flags Affected: Zero, Sign
OR = Logical Inclusive-OR
Hex | Mnemonic | Cycles |
---|---|---|
28 | OR A, A | 8 |
29 | OR A, B | 8 |
2A nn | OR A, #nn | 8 |
2B | OR A, [HL] | 8 |
2C nn | OR A, [N+#nn] | 12 |
2D nn nn | OR A, [#nnnn] | 16 |
2E | OR A, [X] | 8 |
2F | OR A, [Y] | 8 |
9D nn | OR F, #nn | 12 |
CE B4 nn | OR B, #nn | 12 |
CE B5 nn | OR L, #nn | 12 |
CE B6 nn | OR H, #nn | 12 |
D9 nn nn | OR [N+#nn], #nn | 20 |
CE 28 nn | OR A, [X+#ss] | 16 |
CE 29 nn | OR A, [Y+#ss] | 16 |
CE 2A | OR A, [X+L] | 16 |
CE 2B | OR A, [Y+L] | 16 |
CE 2C | OR [HL], A | 16 |
CE 2D nn | OR [HL], #nn | 20 |
CE 2E | OR [HL], [X] | 20 |
CE 2F | OR [HL], [Y] | 20 |
Flags Affected: Zero, Sign
XOR = Logical Exclusive-OR
Hex | Mnemonic | Cycles |
---|---|---|
38 | XOR A, A | 8 |
39 | XOR A, B | 8 |
3A nn | XOR A, #nn | 8 |
3B | XOR A, [HL] | 8 |
3C nn | XOR A, [N+#nn] | 12 |
3D nn nn | XOR A, [#nnnn] | 16 |
3E | XOR A, [X] | 8 |
3F | XOR A, [Y] | 8 |
9E nn | XOR F, #nn | 12 |
CE B8 nn | XOR B, #nn | 12 |
CE B9 nn | XOR L, #nn | 12 |
CE BA nn | XOR H, #nn | 12 |
DA nn nn | XOR [N+#nn], #nn | 20 |
CE 38 nn | XOR A, [X+#ss] | 16 |
CE 39 nn | XOR A, [Y+#ss] | 16 |
CE 3A | XOR A, [X+L] | 16 |
CE 3B | XOR A, [Y+L] | 16 |
CE 3C | XOR [HL], A | 16 |
CE 3D nn | XOR [HL], #nn | 20 |
CE 3E | XOR [HL], [X] | 20 |
CE 3F | XOR [HL], [Y] | 20 |
Flags Affected: Zero, Sign
INC = Increase Register by 1
Hex | Mnemonic | Cycles |
---|---|---|
80 | INC A | 8 |
81 | INC B | 8 |
82 | INC L | 8 |
83 | INC H | 8 |
84 | INC N | 8 |
85 nn | INC [N+#nn] | 16 |
86 | INC [HL] | 12 |
87 | INC SP | 8 |
90 | INC BA | 8 |
91 | INC HL | 8 |
92 | INC X1 | 8 |
93 | INC X2 | 8 |
Flags Affected: Zero
DEC = Decrease Register by 1
Hex | Mnemonic | Cycles |
---|---|---|
88 | DEC A | 8 |
89 | DEC B | 8 |
8A | DEC L | 8 |
8B | DEC H | 8 |
8C | DEC N | 8 |
8D nn | DEC [N+#nn] | 16 |
8E | DEC [HL] | 12 |
8F | DEC SP | 8 |
98 | DEC BA | 8 |
99 | DEC HL | 8 |
9A | DEC X1 | 8 |
9B | DEC X2 | 8 |
Flags Affected: Zero
PUSH = Push Register into Stack
Hex | Mnemonic | Cycles |
---|---|---|
A0 | PUSH BA | 16 |
A1 | PUSH HL | 16 |
A2 | PUSH X | 16 |
A3 | PUSH Y | 16 |
A4 | PUSH N | 12 |
A5 | PUSH I | 12 |
A6 | PUSHX | 16 |
A7 | PUSH F | 12 |
CF B0 | PUSH A | 12 |
CF B1 | PUSH B | 12 |
CF B2 | PUSH L | 12 |
CF B3 | PUSH H | 12 |
CF B8 | PUSHA | 48 |
CF B9 | PUSHAX | 60 |
Flags Affected: None
POP = Pop Register from Stack
Hex | Mnemonic | Cycles |
---|---|---|
A8 | POP BA | 12 |
A9 | POP HL | 12 |
AA | POP X | 12 |
AB | POP Y | 12 |
AC | POP N | 8 |
AD | POP I | 8 |
AE | POPX | 12 |
AF | POP F | 8 |
CF B4 | POP A | 12 |
CF B5 | POP B | 12 |
CF B6 | POP L | 12 |
CF B7 | POP H | 12 |
CF BC | POPA | 32 |
CF BD | POPAX | 40 |
Flags Affected: None
XCHG = Exchange Registers
Hex | Mnemonic | Cycles |
---|---|---|
C8 | XCHG BA, HL | 12 |
C9 | XCHG BA, X | 12 |
CA | XCHG BA, Y | 12 |
CB | XCHG BA, SP | 12 |
CC | XCHG A, B | 8 |
CD | XCHG A, [HL] | 12 |
Flags Affected: None
PACK = Pack and Unpack Nibbles
Hex | Mnemonic | Cycles |
---|---|---|
DE | PACK | 8 |
DF | UNPACK | 8 |
Flags Affected: None
SWAP = Swap Low and High Nibbles
Hex | Mnemonic | Cycles |
---|---|---|
F6 | SWAP A | 8 |
F7 | SWAP [HL] | 12 |
Flags Affected: None
CALL = Call routine
Hex | Mnemonic | Cycles |
---|---|---|
E0 nn | CALLC short #ss | 20 / 8 (Not met) |
E1 nn | CALLNC short #ss | 20 / 8 (Not met) |
E2 nn | CALLZ short #ss | 20 / 8 (Not met) |
E3 nn | CALLNZ short #ss | 20 / 8 (Not met) |
E8 nn nn | CALLC long #ssss | 24 / 12 (Not met) |
E9 nn nn | CALLNC long #ssss | 24 / 12 (Not met) |
EA nn nn | CALLZ long #ssss | 24 / 12 (Not met) |
EB nn nn | CALLNZ long #ssss | 24 / 12 (Not met) |
F0 nn | CALL short #ss | 20 |
F2 nn nn | CALL long #ssss | 24 |
FB nn nn | CALL [#nnnn] | 20 |
FC nn | CINT #nn | 20 |
CE F0 nn | CALLL short #ss | 24 / 12 (Not met) |
CE F1 nn | CALLLE short #ss | 24 / 12 (Not met) |
CE F2 nn | CALLG short #ss | 24 / 12 (Not met) |
CE F3 nn | CALLGE short #ss | 24 / 12 (Not met) |
CE F4 nn | CALLO short #ss | 24 / 12 (Not met) |
CE F5 nn | CALLNO short #ss | 24 / 12 (Not met) |
CE F6 nn | CALLP short #ss | 24 / 12 (Not met) |
CE F7 nn | CALLNP short #ss | 24 / 12 (Not met) |
CE F8 nn | CALLNX0 short #ss | 24 / 12 (Not met) |
CE F9 nn | CALLNX1 short #ss | 24 / 12 (Not met) |
CE FA nn | CALLNX2 short #ss | 24 / 12 (Not met) |
CE FB nn | CALLNX3 short #ss | 24 / 12 (Not met) |
CE FC nn | CALLX0 short #ss | 24 / 12 (Not met) |
CE FD nn | CALLX1 short #ss | 24 / 12 (Not met) |
CE FE nn | CALLX2 short #ss | 24 / 12 (Not met) |
CE FF nn | CALLX3 short #ss | 24 / 12 (Not met) |
Flags Affected: None
JMP = Jump routine (Branch routine)
Hex | Mnemonic | Cycles |
---|---|---|
E4 nn | JBC #ss | 8 |
E5 nn | JBNC #ss | 8 |
E6 nn | JBZ #ss | 8 |
E7 nn | JBNZ #ss | 8 |
EC nn nn | JWC #ssss | 12 |
ED nn nn | JWNC #ssss | 12 |
EE nn nn | JWZ #ssss | 12 |
EF nn nn | JWNZ #ssss | 12 |
F1 nn | JMPB #ss | 8 |
F3 nn nn | JMPW #ssss | 12 |
F4 | JMP HL | 8 |
F5 nn | JDBNZ #ss | 16 |
FD nn | JINT #nn | 8 |
CE E0 nn | JBL #ss | 12 |
CE E1 nn | JBLE #ss | 12 |
CE E2 nn | JBG #ss | 12 |
CE E3 nn | JBGE #ss | 12 |
CE E4 nn | JBO #ss | 12 |
CE E5 nn | JBNO #ss | 12 |
CE E6 nn | JBP #ss | 12 |
CE E7 nn | JBNP #ss | 12 |
CE E8 nn | JBNX0 #ss | 12 |
CE E9 nn | JBNX1 #ss | 12 |
CE EA nn | JBNX2 #ss | 12 |
CE EB nn | JBNX3 #ss | 12 |
CE EC nn | JBX0 #ss | 12 |
CE ED nn | JBX1 #ss | 12 |
CE EE nn | JBX2 #ss | 12 |
CE EF nn | JBX3 #ss | 12 |
Flags Affected: None
RET = Return from routine
Hex | Mnemonic | Cycles |
---|---|---|
F8 | RET | 8 |
F9 | RETI | 8 |
FA | RETSKIP | 8 |
Flags Affected: None
SHL = Shift Left
Hex | Mnemonic | Cycles |
---|---|---|
CE 84 | SHL A | 12 |
CE 85 | SHL B | 12 |
CE 86 | SHL [N+#nn] | 20 |
CE 87 | SHL [HL] | 16 |
Flags Affected: Zero, Carry, Sign
SAL = Shift Alternative Left
Hex | Mnemonic | Cycles |
---|---|---|
CE 80 | SAL A | 12 |
CE 81 | SAL B | 12 |
CE 82 | SAL [N+#nn] | 20 |
CE 83 | SAL [HL] | 16 |
Flags Affected: All
SHR = Shift Right
Hex | Mnemonic | Cycles |
---|---|---|
CE 8C | SHR A | 12 |
CE 8D | SHR B | 12 |
CE 8E | SHR [N+#nn] | 20 |
CE 8F | SHR [HL] | 16 |
Flags Affected: Zero, Carry, Sign
SAR = Shift Alternative Right
Hex | Mnemonic | Cycles |
---|---|---|
CE 88 | SAR A | 12 |
CE 89 | SAR B | 12 |
CE 8A | SAR [N+#nn] | 20 |
CE 8B | SAR [HL] | 16 |
Flags Affected: All
ROL = Rotate Left
Hex | Mnemonic | Cycles |
---|---|---|
CE 94 | ROL A | 12 |
CE 95 | ROL B | 12 |
CE 96 | ROL [N+#nn] | 20 |
CE 97 | ROL [HL] | 16 |
Flags Affected: Zero, Carry, Sign
ROLC = Rotate Left though Carry
Hex | Mnemonic | Cycles |
---|---|---|
CE 90 | ROLC A | 12 |
CE 91 | ROLC B | 12 |
CE 92 | ROLC [N+#nn] | 20 |
CE 93 | ROLC [HL] | 16 |
Flags Affected: Zero, Carry, Sign
ROR = Rotate Right
Hex | Mnemonic | Cycles |
---|---|---|
CE 9C | ROR A | 12 |
CE 9D | ROR B | 12 |
CE 9E | ROR [N+#nn] | 20 |
CE 9F | ROR [HL] | 16 |
Flags Affected: Zero, Carry, Sign
RORC = Rotate Right though Carry
Hex | Mnemonic | Cycles |
---|---|---|
CE 98 | RORC A | 12 |
CE 99 | RORC B | 12 |
CE 9A | RORC [N+#nn] | 20 |
CE 9B | RORC [HL] | 16 |
Flags Affected: Zero, Carry, Sign
NOT = Logical NOT
Hex | Mnemonic | Cycles |
---|---|---|
CE A0 | NOT A | 12 |
CE A1 | NOT B | 12 |
CE A2 | NOT [N+#nn] | 20 |
CE A3 | NOT [HL] | 16 |
Flags Affected: Zero, Sign
NEG = Negate
Hex | Mnemonic | Cycles |
---|---|---|
CE A4 | NEG A | 12 |
CE A5 | NEG B | 12 |
CE A6 | NEG [N+#nn] | 20 |
CE A7 | NEG [HL] | 16 |
Flags Affected: All
EX = Expand Register
Hex | Mnemonic | Cycles |
---|---|---|
CE A8 | EX BA, A | 12 |
Flags Affected: None
HALT = Halt CPU
Hex | Mnemonic | Cycles |
---|---|---|
CE AE | HALT | 8 |
Flags Affected: None
STOP = Stop CPU
Hex | Mnemonic | Cycles |
---|---|---|
CE AF | STOP | 8 |
Flags Affected: None
MUL = Multiply
Hex | Mnemonic | Cycles |
---|---|---|
CE D8 | MUL L, A | 48 |
Flags Affected: All
DIV = Divide
Hex | Mnemonic | Cycles |
---|---|---|
CE D9 | DIV HL, A | 52 |
Flags Affected: All
Note: Can throw Division by Zero